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| AT27C020 Features * Fast Read Access Time - 55 ns * Low Power CMOS Operation * - 100 A max. Standby - 25 mA max. Active at 5 MHz JEDEC Standard Packages - 32-Lead 600-mil PDIP - 32-Lead PLCC - 32-Lead TSOP 5V 10% Supply High-Reliability CMOS Technology - 2,000V ESD Protection - 200 mA Latchup Immunity RapidTM Programming Algorithm - 100 s/byte (typical) CMOS and TTL Compatible Inputs and Outputs Integrated Product Identification Code Commercial and Industrial Temperature Ranges * * * * * * 2-Megabit (256K x 8) OTP EPROM AT27C020 Description The AT27C020 is a low-power, high performance 2,097,152-bit one-time programmable read only memory (OTP EPROM) organized as 256K by 8 bits. It requires only one 5V power supply in normal read mode operation. Any byte can be accessed in less than 55 ns, eliminating the need for speed reducing WAIT states on high performance microprocessor systems. In read mode, the AT27C020 typically consumes 8 mA. Standby mode supply current is typically less than 10 A. PLCC Top View Pin Name A0 - A17 O0 - O7 CE OE PGM Function Addresses Outputs Chip Enable Output Enable Program Strobe A7 A6 A5 A4 A3 A2 A1 A0 O0 A12 A15 A16 VPP VCC PGM A17 Pin Configurations PDIP Top View VPP A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC PGM A17 A14 A13 A8 A9 A11 OE A10 CE 07 06 05 04 03 A11 A9 A8 A13 A14 A17 PGM VCC VPP A16 A15 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 TSOP Top View Type 1 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE A10 CE 07 06 05 04 03 GND 02 01 O0 A0 A1 A2 A3 01 02 GND 03 04 05 06 14 15 16 17 18 19 20 5 6 7 8 9 10 11 12 13 4 3 2 1 32 31 30 29 28 27 26 25 24 23 22 21 A14 A13 A8 A9 A11 OE A10 CE 07 Rev. 0570C-B-12/97 1 The AT27C020 is available in a choice of industry standard JEDEC-approved one-time programmable (OTP) plastic PDIP, PLCC, and TSOP packages. All devices feature twoline control (CE, OE) to give designers the flexibility to prevent bus contention. With 256K byte storage capability, the AT27C020 allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media. Atmel's 27C020 have additional features to ensure high quality and efficient production use. The RapidTM Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100 s/byte. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages. System Considerations Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in device non-conformance. At a minimum, a 0.1 F high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the V CC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 F bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array. Block Diagram 2 AT27C020 AT27C020 Absolute Maximum Ratings* Temperature Under Bias.......................-55C to +125C Storage Temperature............................-65C to +150C Voltage on Any Pin with Respect to Ground ............................... -2.0V to +7.0V(1) Voltage on A9 with Respect to Ground ............................ -2.0V to +14.0V(1) Note: 1. *NOTICE: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is VCC + 0.75V DC which may overshoot to +7.0V for pulses of less than 20 ns. VPP Supply Voltage with Respect to Ground ............................. -2.0V to +14.0V(1) Operating Modes Mode/Pin Read Output Disable Standby Rapid Program PGM Verify PGM Inhibit Product Identification Notes: (4) (2) CE VIL X VIH VIL VIL VIH VIL OE VIL VIH X VIH VIL X VIL PGM X(1) X X VIL VIH X X Ai Ai X X Ai Ai X A9 = VH(3) A0 = VIH or VIL A1 - A17 = VIL VPP X X X VPP VPP VPP X Outputs DOUT High Z High Z DIN DOUT High Z Identification Code 1. X can be VIL or VIH. 2. Refer to Programming Characteristics. 3. VH = 12.0 0.5V. 4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled low (VIL) to select the Manufacturer's Identification byte and high (VIH) to select the Device Code byte. 3 DC and AC Operating Conditions for Read Operation AT27C020 -55 Operating Temperature (Case) VCC Power Supply Com. Ind. 0C - 70C -40C - 85C 5V 10% -70 0C - 70C -40C - 85C 5V 10% -90 0C - 70C -40C - 85C 5V 10% -12 0C - 70C -40C - 85C 5V 10% -15 0C - 70C -40C - 85C 5V 10% DC and Operating Characteristics for Read Operation Symbol ILI ILO IPP ISB ICC VIL VIH VOL VOH Notes: (2) Parameter Input Load Current Output Leakage Current VPP (1) Condition VIN = 0V to VCC (Com., Ind.) VOUT = 0V to VCC (Com., Ind.) VPP = VCC ISB1 (CMOS), CE = VCC 0.3V ISB2 (TTL), CE = 2.0 to VCC + 0.5V f = 5 MHz, IOUT = 0 mA, CE = VIL Min Max 1.0 5.0 10 100 1.0 25 Units A A A A mA mA V V V V Read/Standby Current VCC(1) Standby Current VCC Active Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage -0.6 2.0 IOL = 2.1 mA IOH = -400 A 2.4 0.8 VCC + 0.5 0.4 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP. 2. VPP may be connected directly to VCC except during programming. The supply current would then be the sum of ICC and IPP. AC Characteristics for Read Operation AT27C020 -55 Symbol tACC(3) tCE(2) tOE(2)(3) tDF(4)(5) Parameter Address to Output Delay CE to Output Delay OE to Output Delay OE or CE High to Output Float, whichever occurred first Output Hold from Address, CE or OE,whichever occurred first 7 Condition CE = OE = VIL OE = VIL CE = VIL Min Max 55 55 20 18 Min -70 Max 70 70 30 20 Min -90 Max 90 90 35 20 Min -12 Max 120 120 35 30 Min -15 Max 150 150 40 40 Units ns ns ns ns tOH Note: 7 0 0 0 ns 1. 2, 3, 4, 5. See AC Waveforms for Read Operation diagram. 4 AT27C020 AT27C020 AC Waveforms for Read Operation(1) Notes: 1. 2. 3. 4. 5. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC. This parameter is only sampled and is not 100% tested. Output float is defined as the point when data is no longer driven. Input Test Waveforms and Measurement Levels For -55 devices only: 3.0V AC DRIVING LEVELS 0.0V 1.5V AC MEASUREMENT LEVEL Output Test Load (1) tR, tF < 5 ns (10% to 90%) For -70,-90,-12,-15 devices only: Note: 1. CL = 100 pF including jig capacitance except -55 devices where CL = 30 pF. tR, tF < 20 ns (10% to 90%) Pin Capacitance f = 1 MHz, T = 25C(1) Typ CIN COUT Note: Max 8 12 Units pF pF Conditions VIN = 0V VOUT = 0V 4 8 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested. 5 Programming Waveforms (1) Notes: 1. 2. 3. The Input Timing reference is 0.8V for VIL and 2.0V for VIH. tOE and tDFP are characteristics of the device but must be accommodated by the programmer. When programming the AT27C020, a 0.1 F capacitor is required across VPP and ground to suppress voltage transients. DC Programming Characteristics TA = 25 5C, VCC = 6.5 0.25V, VPP = 13.0 0.25V Limits Symbol ILI VIL VIH VOL VOH ICC2 IPP2 VID Parameter Input Load Current Input Low Level Input High Level Output Low Voltage Output High Voltage VCC Supply Current (Program and Verify) VPP Supply Current A9 Product Identification Voltage CE = PGM = VIL 11.5 IOL = 2.1 mA IOH = -400 A 2.4 40 20 12.5 Test Conditions VIN = VIL, VIH -0.6 2.0 Min Max 10 0.8 VCC + 1.0 0.4 Units A V V V V mA mA V 6 AT27C020 AT27C020 AC Programming Characteristics TA = 25 5C, VCC = 6.5 0.25V,VPP = 13.0 0.25V Limits Symbol tAS tCES tOES tDS tAH tDH tDFP tVPS tVCS tPW tOE tPRT Notes: Parameter Address Setup Time CE Setup Time OE Setup Time Data Setup Time Address Hold Time Data Hold Time OE High to Output Float Delay VPP Setup Time VCC Set up Time PGM Program Pulse Width(3) Data Valid from OE VPP Pulse Rise Time During Programming (2) Test Condition (1) Min 2 2 Max Units s s s s s s Input Rise and Fall Times: (10% to 90%) 20 ns. Input Pulse Levels: 0.45V to 2.4V Input Timing Reference Level: 0.8V to 2.0V Output Timing Reference Level: 0.8V to 2.0V 2 2 0 2 0 2 2 95 105 150 50 130 ns s s s ns ns 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP. 2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven -- see timing diagram. 3. Program Pulse width tolerance is 100 s 5%. Atmel's 27C020 Integrated Product Identification Code Pins Codes Manufacturer Device Type A0 0 1 O7 0 1 O6 0 0 O5 0 0 O4 1 0 O3 1 0 O2 1 1 O1 1 1 O0 0 0 Hex Data 1E 86 7 Rapid Programming Algorithm A 100 s PGM pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is raised to 13.0V. Each address is first programmed with one 100 s PGM pulse without verification. Then a verification / reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 100 s pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been checked. VPP is then lowered to 5.0V and VCC to 5.0V. All bytes are read again and compared with the original data to determine if the device passes or fails. 8 AT27C020 AT27C020 Ordering Information tACC (ns) 55 ICC (mA) Active 25 Standby 0.1 Ordering Code AT27C020-55JC AT27C020-55PC AT27C020-55TC AT27C020-55JI AT27C020-55PI AT27C020-55TI AT27C020-70JC AT27C020-70PC AT27C020-70TC AT27C020-70JI AT27C020-70PI AT27C020-70TI AT27C020-90JC AT27C020-90PC AT27C020-90TC AT27C020-90JI AT27C020-90PI AT27C020-90TI AT27C020-12JC AT27C020-12PC AT27C020-12TC AT27C020-12JI AT27C020-12PI AT27C020-12TI AT27C020-15JC AT27C020-15PC AT27C020-15TC AT27C020-15JI AT27C020-15PI AT27C020-15TI Package 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T 32J 32P6 32T Operation Range Commercial (0C to 70C) Industrial (-40C to 85C) Commercial (0C to 70C) Industrial (-40C to 85C) Commercial (0C to 70C) Industrial (-40C to 85C) Commercial (0C to 70C) Industrial (-40C to 85C) Commercial (0C to 70C) Industrial (-40C to 85C) 25 0.1 70 25 0.1 25 0.1 90 25 0.1 25 0.1 120 25 0.1 25 0.1 150 25 0.1 25 0.1 Package Type 32J 32P6 32T 32-Lead,Plastic J-Leaded Chip Carrier (PLCC) 32-Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP) 32-Lead, Plastic Thin Small Outline Package (TSOP) 9 |
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